// Connections to EPROM socket
// 
//                            ______________
//                            |     \/     |
// PIN_19 = C21 = IO_016 = A7 |01        24| VCC= Not Connected !!
// PIN_20 = C22 = IO_017 = A6 |02        23| A8 = IO_018 = D21 = PIN_21
// PIN_22 = D22 = IO_019 = A5 |03        22| A9 = IO_020 = E21 = PIN_34
// PIN_24 = E22 = IO_021 = A4 |04        21| A11= IO_022 = F21 = PIN_25
// PIN_26 = F22 = IO_023 = A3 |05        20| *Output Enable = Not Connected
// PIN_27 = G21 = IO_024 = A2 |06        19| A10= IO_025 = G22 = PIN_28
// PIN_31 = J21 = IO_026 = A1 |07        18| *Chip Enable = A12 = PIN_P18
// PIN_32 = J22 = IO_027 = A0 |08        17| D7 = IO_028 = K21 = PIN_33
// PIN_34 = K22 = IO_029 = D0 |09        16| D6 = IO_030 = J19 = PIN_35
// PIN_36 = J20 = IO_031 = D1 |10        15| D5 = IO_032 = J18 = PIN_37
// PIN_38 = K20 = IO_033 = D2 |11        14| D4 = IO_034 = L19 = PIN_39
//                PIN_30 = GND|12        13| D3 = IO_035 = L18 = PIN_40
//                            |____________|
//
//

module CartSim(clk, address_in, data_out, address_out, data_in, oe, we, rst, pb1, pb2, pb3, pb4, seg1, seg2, seg3, seg4, leds, leds2);
input clk;
input [12:0] address_in;
output [7:0] data_out;
output [21:0] address_out;
input [7:0] data_in;
input pb1,pb2,pb3,pb4;
output [6:0] seg1;
output [6:0] seg2;
output [6:0] seg3;
output [6:0] seg4;
output [7:0] leds;
output [9:0] leds2;
output oe,rst,we;

parameter [9:0] maxF8Rom=10'o0410;

reg oe;
reg [1:0] count;
reg [2:0] bufferlow;
reg [2:0] buf0;
reg [2:0] buf1;
reg [2:0] buf2;
reg [2:0] buf3;
reg [7:0] data;
reg a12;

wire [12:0] address_in_debounced;

assign bankSwitchOn       = (address_out[21:12] < maxF8Rom);
assign leds               = data_out;
assign address_out[11:0]  = address_in_debounced[11:0];
assign address_out[12]    = a12;
assign address_out[14:13] = buf0[2:1];
assign address_out[17:15] = buf1;
assign address_out[20:18] = buf2;
assign address_out[21]    = buf3[0];
assign leds2[9:1]         = address_in_debounced[9:1];
assign leds2[0]           = bankSwitchOn;
assign we                 = 1;
assign rst                = 1;
assign ce                 = address_in[12];
assign do_switch          = bankSwitchOn & (address_in_debounced[12:1]==12'b111111111100);
assign out_enb            = ce & (~do_switch);
assign data_out           = out_enb ? data : 8'bZZZZZZZZ;

debounce debouncer(clk,address_in,address_in_debounced);

sevenseg sevenseg0(buf0,seg1[0],seg1[1],seg1[2],seg1[3],seg1[4],seg1[5],seg1[6]);
sevenseg sevenseg1(buf1,seg2[0],seg2[1],seg2[2],seg2[3],seg2[4],seg2[5],seg2[6]);
sevenseg sevenseg2(buf2,seg3[0],seg3[1],seg3[2],seg3[3],seg3[4],seg3[5],seg3[6]);
sevenseg sevenseg3(buf3,seg4[0],seg4[1],seg4[2],seg4[3],seg4[4],seg4[5],seg4[6]);

// Handle flash ROM access
always @ (posedge clk)
begin
  count<=count+1;
  case(count)
    0: oe<=1;
    1: oe<=0;
    2: oe<=0;
    3: begin
         if (data != data_in) 
           data<=data_in;
         oe<=1;
       end
  endcase
end

// Handle F8 Bankswitching
always @ (posedge clk)
if (bankSwitchOn)
begin
  if (do_switch)
    a12<=address_in_debounced[0];
end
else
  a12<=buf0[0];

// Handle push buttons for rom selection
always @ (posedge pb1)
if (bankSwitchOn)
begin
  buf0[2:1]<=buf0[2:1]+1;
  buf0[0]<=0;
end
else
  buf0<=buf0+1;

always @ (posedge pb2)
  buf1<=buf1+1;

always @ (posedge pb3)
  buf2<=buf2+1;

always @ (posedge pb4)
  if (buf3>=1)
    buf3<=0;
  else
    buf3<=1;

endmodule